1. Technical Field
Embodiments of the present disclosure relate to a semiconductor device which performs a write operation by using an error correction code.
2. Description of the Related Art
Recently, in order to increase the operating speed of a semiconductor device, DDR2 or DDR3 signaling is used, in which 4-bit or 8-bit data are inputted/outputted in each clock cycle. In the case where an input/output speed of data is increased, the probability of an error occurring during a data transmission process increases. Therefore, a separate device and a method for ensuring the reliability of data transmission are additionally needed.
There is disclosed a method of generating, at each time of transmitting data, error codes capable of checking an occurrence of an error and transmitting the error codes with the data, thereby ensuring the reliability of the data transmission. The error codes include an error detection code (EDC) capable of detecting whether an error occurred, and an error correction code (ECC) capable of correcting, by itself, an error when an error has occurred.